The various chips on a circuit board operate with different voltages and are therefore designed according to their respective voltage tolerance levels. In normal operating conditions, circuits with different operating voltages are separated from each other. Nonetheless, in practice, it is possible for a short circuit being established between the pins of circuits with different operating voltages, for example, because of accumulation of dust, or intrusion of an electrically conductive substance such as water or metal. Given an ordinary design framework without any protection apparatus, a short circuit between the pins of circuits with different operating voltages is likely to subject a chip to overcurrent and hence excessive power consumption. As a result, the overloaded chip heats up quickly and may burn out or even catch fire, thereby posing a safety issue.
U.S. Pat. No. 6,829,129 connects each of alternating current (AC) power supplies with a fuse in series thereto, and each two of the power supplies with a metal oxide varistor therebetween. The metal oxide varistor or the fuse will burn out under abnormal circuit conditions to break and thereby protect the circuit. In practice, however, the metal oxide varistor and the fuse are not very reliable, sometimes burnout resistant, and therefore may not be effective in protecting a circuit.
U.S. Pat. No. 7,274,543 connects an overvoltage protection circuit to an I/O pin of a chip to identify whether or not the voltage at the I/O pin is within a normal operating range and accordingly, to control a high-breakdown-voltage MOS transistor to disconnect the chip from the power supply of unduly high voltage. However, as a short circuit may occur at each of the I/O pins of a chip, it is necessary to provide each of the I/O pins with an overvoltage protection circuit, and the overvoltage protection circuits will take up much space.
U.S. Pat. No. 7,253,505 connects a layer of variable-resistance material between a ground terminal and a ground layer of a chip. When a surge pulse occurs, the energy of the surge pulse will flow through the variable-resistance material. Due to the nature of the variable-resistance material, the energy of the surge pulse will be released evenly to the ground lines, and the chip is thus protected from damage. This solution works only with a specific manufacturing process and therefore does not apply to all types of chips. More badly, with the layer of variable-resistance material disposed on the ground layer, an increase in current is always accompanied a reduction in voltage, and hence it is not applicable to chips which operate with high current.
Therefore, it is desired a simple-structure, widely applicable, and small-size overstress protection apparatus.